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|ID||Project||Category||View Status||Date Submitted||Last Update|
|0000190||Firmware||Hardware Interface||public||2011-06-21 13:42||2011-12-13 12:43|
|Priority||normal||Severity||minor||Reproducibility||have not tried|
|Target Version||0.4.0||Fixed in Version|
|Summary||0000190: Select Permanent Pins For Core Functions|
|Description||These things need assigning:|
1) Ignition Coil Outputs - For now SHARES PORTT 2-7 *
2) Fuel Injector Outputs - For now SHARES PORTT 2-7 **
3) CONFIRMED PORTA 7 Fuel Pump Relay Drive
4) CONFIRMED PORTA 6 SM load/run AND CEL/warning light
5) CONFIRMED PORTA 5 Power On Accessories Output
6) CONFIRMED PORTA 4 Knock Circuit Windowing Output
7) Key Power On Signal - Highly likely to be XIRQ or IRQ on PE0 or PE1 ***
* = In future _could_ move, however if so, these pins will still be usable as such.
** = In future WILL move to PORTB and part of PORTA 0-3 for primary injectors.
*** = Key power on signal is more complex that it might sound. This circuit is yet to be designed, however work is underway right now.
Note, 1 & 2 combine to mean that you need to route your PORT T 2-7 pins to both ignition outputs and injector outputs and have a way of selecting which is which in hardware. This is a temporary measure. Due to the latter part of B it is also advised that you route PORT B 0-5 to the injector drivers and provide a way of configuring it in hardware to use those. These restrictions will be removed in future.
RPM inputs are Port T 0 and 1. Additional source information pins are Port K 4 and 5.
ADC pins can stay as-is pin wise, with the following stipulations:
- IAP, EGO2, MAF will become generic spares SpareADC0, SpareADC1 and SpareADC2
- IAT,CHT,TPS,EGO,BRV,MAT MUST be implemented on ALL hardware designs.
- MAP MUST be provided on All hardware designs, internal or external
- MAT is optional to connect, and unused in most simple installs
- TPS is optional to connect, but highly recommended for all installs
- EGO is optional to connect, but highly recommended for all installs
- AAP is optional, but highly recommended to implement and suggested to install/use where foreseeable driving will be in mountainous conditions.
On-board MAP sensor hardware implementation is STRONGLY recommended and only acceptble to omit on very compact designs.
MAP will be configurable to use:
- The main MAP pin for internal MAP sensor
- The main MAP pin for an external MAP sensor interface
- Another unused pin for an optional external MAP sensor interface where internal IS provided
- Multiple ADC inputs at the same time for external multiple MAP sensor ITB use
However this flexibility should NEVER be abused to place an on-board MAP sensor on a random pin. To be FreeEMS hardware compliant, if your design has an on-board MAP sensor it MUST be on the correct pin. Furthermore, in the rare event that your design does not have an on-board MAP sensor your primary external MAP sensor interface MUST use the correct pin. This is to ease setup and make the majority of systems "just work".
Grounding of the CPU/ADC reference should be considered sacred. It is strongly recommended that power grounds be tied to protected spare ADC pins with no filtering such that sag and noise can be sampled. Likewise separated 12v inputs for various things should be monitored if there are spare ADC pins available. For BRV use the recommended voltage divider ratio is 3.9k/1k in order to supply the ADC pin with a strong enough drive. For the always on connection, where provided, 39k/10k provides a reading with negligible current draw.
For non-core things which pin is used shall be configurable:
- MAF will use any unused spare ADC pin.
- Extra wideband sensors will use any unused spare ADC pin.
- Extra temperature and pressure sensors will use any unused spare ADC pin.
- All other random ADC uses can use any unused spare ADC pin.
GP low side high power drivers sould be attached to PORT P 1,3,5,7 first, and if there are more, then PORT P 0,2,4,6 second. The reason for this is that the odd numbered pins are 16 bit capable. If 8 drivers are attached and the four 16 bit capable pins are used as such, the other 4 become general on/off outputs.
For all other GPIO any unused non-ADC pin can be used.
MODA and MODB (PE5 & PE6) must be tied to ground with a resistor, probably with a value in the range 1k - 100k. Other unused port E pins should be treated with extreme caution as they contain various special function connections.
Primary comms are over SCI0 which uses PS0 and PS1.
Secondary comms are over SCI1 which uses PS2 and PS3.
Tertiary comms are over SCI2 which uses PJ0 and PJ1.
SCI3, SCI4 and SCI5 are not current planned to have support in official code.
Primary SPI is SPI0 on PS4-7
Secondary SPI is SPI1 on PH0-3
Tertiary SPI is SPI2 on PH4-7
Primary I2C is I2C0 on PORT J 6 and PORT J 7
Secondary I2C is I2C1 on PORT J 4 and PORT J 5
Note, I2C1 is only available on 144 pin packages. Therefore I2C0 is the only I2C on 112 pin packages and it should be used for GPIO last in designs using 112 pin packages.
Primary CAN is CAN0 on PM0 and PM1
Secondary CAN is CAN1 on PM2 and PM3
Tertiary CAN is CAN2 on PM4 and PM5
CAN3 and CAN4 will not be used in official code.
Pins PM6 and PM7 can be used for either CAN3 or SCI3, however this will not appear in official code. SCI4 and SCI5 can be used for custom serial applications, however they will not be used in official code.
Port H and Port J have shared interrupts and are thus the best pins for digital input pins. All of port H is available on both 112 and 144 pin packages, however they are shared with SPI1 and SPI2. On the 112 pin package only PJ0 and PJ1 can be used from PORT J, and they are shared with SCI2.
Later when the XGATE BB code is completed 144 pin packages should use PORTC and PORTD for extra injector and possibly ignition drivers. Both 112 and 144 pin packages can, in future, use any available pins for XG BB injector drivers, however PORTH and PORTM are most suitable if not being used for other peripherals.
In general, it is up to the designer which features they include in their designs, with the exception of the compulsory items near the top of this document. Designers should choose functions and pin assignments in line with these guide lines for two reasons 1) maximum compatibility with available firmware 2) Maximum flexibility and usefulness to the customer/user.
Corrections, comments, critique and general abuse are all welcome in comments below, forum posts, phone calls, instant messages, IRC chats, emails and any other available mediums.
|Additional Information||Risk of Breakage level refers to existing HW designs. They have all been warned, however. Pin out is volatile until research done in 0000186 - get stuck in and help!|
|Tags||No tags attached.|
|Risk of Breakage||medium|
It would help to know for the "rest" of us, which capabilities each PORT sections have, i.e. are some only input or output capable, do some have features others don't (tri-state, input or output compare, PWM, nothing etc?)
i.e. it make no sense to waste "feature rich" (IC/OC/PWM ports) on simple things like On/Off low frequency outputs, like cooling fan, EGR, or whatever.
|The pin out document in the source contains most of that info summarised, and the balance is in the 1200+ page data sheet for the CPU. Some behaviour seen on the CPU is not obvious in those documents, hence the fuel/ign pin state of indecision.|
|Having that pinout info IN THIS TICKET would help a lot ,and not require people to have to look in 3 different places.|
|It's too complicated and vast to put here, IMO.|
|Major update, more editing to come later.|
|Fairly complete now, comments and criticisms welcome either here or on the forum!|
|Added GPI interrupt pin notes and general how to apply this info comment.|
|Added note on future XG pins and reduced risk to medium.|
|Added knock window output pin!|
edited on: 2011-09-01 02:05
If there is any question about running out of low speed pins, there is always i2c expansion:
I'll add that I prefer using a MAF sensor, so assigning it a "recommended but not reserved" pin would be good.
|Added info on RPM inputs that was previously missing.|
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